Advancing the Future of Secure Computing

Our research spans patented innovations in processor security, cache security, and intelligent system protection.

We’ve invented novel and realizable techniques and methods that strengthen hardware and software against modern threats, including side-channel vulnerabilities, speculative execution attacks, and IoT attacks. We developed AI-driven defenses to secure systems from smartphones to critical system infrastructures, like the powergrid.  

Our portfolio includes:

• Secure Processor Architectures: Reinventing how computing cores and memory systems handle data securely and efficiently. The portfolio includes providing self-protecting data, hardware-software foundation for trusted execution environments (TEEs), and minimalist security protection for mobile and embedded devices.

• Secure Cache Architectures: Defining novel cache architectures that defeat dangerous side and covert channel attacks that can silently leak secret, private, or critical information while preserving performance.

• Hardware Defenses: Protecting against speculative execution and other emerging attacks.

• Cloud Computing Security: Enabling cloud customers to monitor the security of their virtual machines in the cloud.

• Anomaly Detection and AI: Safeguarding critical infrastructure, mobile devices, and cloud environments using artificial intelligence, such as deep learning systems.

• Smartphone Security: Detecting imposter attacks and smartphone theft.

• Critical and Physical Infrastructure Anomaly Detection: Enabling earlier detection of anomalous behavior due to malicious attacks or benign component failures.

• Crypto & AI Acceleration: Introducing new instructions and functional units that accelerate cryptography, cryptanalysis, AI, multimedia, wireless computation, data compression, and bioinformatics. This includes advanced bit permutations and parallel table lookup operations.

• Novel Shifters: Providing novel, bit-level shifter designs that advance both security and performance, including general purpose parallel extract, parallel deposit, and bit permutation operations.