PATENT FAMILY
Systems and Methods for Random Fill Caching and Prefetching for Secure Cache Memories
Architectural techniques introducing controlled randomness into cache fill and prefetch operations to reduce deterministic information leakage in shared processor environments.
Overview
This patent family focuses on reducing the predictability of cache behavior by introducing controlled randomization into cache fill and prefetch mechanisms.
Rather than altering structural cache organization, these inventions modify how data is inserted and prefetched within cache systems, disrupting deterministic access patterns that can be exploited in side-channel analysis.
Patents in This Family
US 10,956,617 B2 | Issued: March 23, 2021
Introduces randomized cache fill and secure prefetch mechanisms designed to reduce predictability of cache behavior.
US 12,079,127 B2 | Issued: September 2, 2024
Extends and refines randomized cache management techniques to broaden protection across shared-memory environments.
Core Architectural Coverage
Controlled randomization of cache fill behavior
Secure prefetch strategies limiting deterministic memory exposure
Disruption of predictable cache access patterns
Probabilistic mitigation of timing and access-based leakage
Architectural techniques designed to obscure memory observability
Claim Scope Across the Family
Foundational randomized cache fill mechanisms
Extended coverage for secure prefetch control
Variations addressing shared-memory and multi-core systems
Protection against deterministic access-pattern exploitation
Potential Applications
Multi-core processors with shared cache hierarchies
Virtualized and multi-tenant computing platforms
Systems exposed to cache timing and access-pattern risks
Security-sensitive and confidentiality-focused workloads
Licensing & Collaboration
This patent family is available for licensing and strategic collaboration.