Novel Shifters & Advanced Bit Permutations
Architectural techniques for efficient and flexible bit-level manipulation, enabling advanced data transformation, permutation, and mixing operations in modern processors.
Security Challenge Overview
Many security-critical and performance-sensitive workloads rely on fast, flexible bit-level operations. Conventional processor shifter designs often limit the efficiency or expressiveness of these operations, increasing instruction count, latency, and power consumption for complex data transformations used in cryptography, security analysis, and advanced computing workloads.
Key challenges include:
Inefficient support for complex bit permutations and transformations
Performance overhead from multi-instruction sequences
Limited architectural flexibility in conventional shifter designs
CoreSecure’s Architectural Approach
CoreSecure Technologies’ shifter patents introduce novel microarchitectural shifter designs based on butterfly and inverse butterfly routing techniques. These architectures enable a wide range of bit-level operations—such as shifts, rotates, mixes, permutations, parallel extracts, and parallel deposits—using compact and efficient hardware structures that integrate cleanly into existing processor pipelines.
Key Technical Capabilities
Butterfly and inverse butterfly routing architectures
Efficient support for advanced bit permutations
Parallel extract and parallel deposit operations
Reduced instruction count for complex bit manipulation
Hardware-efficient and scalable shifter designs
Compatibility with modern processor microarchitectures
Patent Portfolio: Novel Shifters & Advanced Bit Permutations
The following patents represent CoreSecure Technologies’ intellectual property related to advanced shifter architectures and flexible bit-level manipulation. Each patent links to a dedicated patent page containing the abstract, the summary of invention, links to Google Patents and the USPTO, and references to related patents within the same family.
Microprocessor Shifter Circuits Utilizing Butterfly and Inverse Butterfly Circuits, and Control Circuits Therefor
US 8,285,766 B2 | Issued: October 9, 2012
US 9,134,953 B2 | Issued: September 15, 2015
See also Cryptography & AI Acceleration and Artificial Intelligence & Security
Potential Application Areas
Cryptographic and security-sensitive computations
Data transformation and permutation workloads
High-performance parallel computing systems
Processor designs requiring flexible bit-level operations
Data compression and encoding systems
Multimedia and signal processing workloads
AI and bioinformatics acceleration
Licensing & Collaboration
CoreSecure Technologies’ shifter and bit-manipulation patents are available for licensing and strategic collaboration, supporting efficient and secure computation across a wide range of processor architectures and system designs.